IBM demonstrates a nanosheet transistor that can withstand boiling nitrogen

IBM demonstrates a nanosheet transistor that can withstand boiling nitrogen

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What just happened? IBM’s concept nanosheet transistor demonstrated nearly double the performance improvement at the boiling point of nitrogen. This achievement is expected to result in several technological advances and could pave the way for nanosheet transistors to replace FinFETs. Even more excitingly, it could lead to the development of a more powerful class of chips.

Liquid nitrogen is widely used throughout the semiconductor manufacturing process to remove heat and create inert environments in critical process areas. However, when brought to the boiling point, which is 77 Kelvin or -196 °C, it can no longer be used in certain applications because the current generation of nanosheet transistors hasn’t been designed to withstand temperatures of this kind.

This limitation is unfortunate because it has been theorized that chips could boost their performance in such an environment. Now, this possibility may be realized, as demonstrated by a concept nanosheet transistor IBM presented at the 2023 IEEE International Electron Device Meeting held earlier this month in San Francisco.

The concept transistor showed nearly double the performance at the boiling point of nitrogen, compared with room temperature conditions of 300 K. This performance boost was attributed to less charge carrier scattering, resulting in lower power consumption. Lowering the power supply could help scale down chip size by reducing the transistor width. Indeed, this development could potentially lead to the creation of a new class of powerful chips developed with liquid nitrogen cooling without overheating the chip.

IBM’s concept nanosheet transistor could also play a role in the expected replacement of FinFETs by nanosheet transistors, as the latter are likely to better meet the technical needs for 3 nm chips. The advantages of nanosheet transistors over FinFETs, in general, include reduced size, high drive currents, reduced variability, and a gate-all-around structure. The high drive current is achieved by stacking nanosheets. In a standard logic cell, nanosheet-shaped conduction channels are stacked in an area where only one FINFET structure can be accommodated.

We can expect nanosheet transistors to make their industry debut with the 2 nm-class nodes, such as the TSMC N2 and Intel 20A. They are also utilized in IBM’s first 2-nm prototype processor.

To state the obvious, smaller is always better in chip technology, and here too, nanosheet transistors will advance the industry.

The nanosheet device architecture allows IBM to fit 50 billion transistors in a space roughly the size of a fingernail, according to Ruqiang Bao, a senior researcher at IBM. In short, nanosheet technology will prove to be integral in scaling down logic devices, as highlighted by IEEE.

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